Casio CTK-711EX Manuel d'utilisateur télécharger pdf (Page 10)

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VDD

Battery set

RESET

CPU

HD6473042F16-463

LSI9

Power Supply

Circuit

DSP

HG51B155FD

LSI4

RESB

Key Controller

TC190C020AF-001

LSI10

DVDD

VDD

RESET

APO

PWSW

From power switch

RES

NMI

PB0

PA7

RESET

PW/SW ON

APO

DVDD

(5V)

MEMORY DEVICES

Each memory device has the following data.

1 RAM1 :

S-RAM for operation program, Register, Pattern and

Song. (Upper part of data bus)

2 Internal ROM of CPU :

Main program data for system operation

3 Internal RAM of CPU :

Work area for system operation

4 ROM1 :

Demo, Accompaniment data, Song, Pattern, Synth mode

5 ROM2 :

Sound Waveforms/Tone data Digital sound effect

6 Working RAM :

Work area for DSP

Initial reset

When batteries are set or an AC adapter is connected, the reset IC provides a low pulse to the CPU.

When the power switch is pressed, the CPU receives a low pulse of POWER signal. The CPU first raises

APO signal to +5 V to generate DVDD voltage, then raises RESET signal to +5 V. During this period the

DSP and the key controller LSI initialize their internal circuits.

RESET CIRCUIT

CPU

ROM

RAM

512 kbit

16 kbit

DSP

LSI9

LSI4

Working RAM

256 kbit

LSI5

Internal Memory

ROM1

8 Mbit

LSI2

RAM1

1 Mbit

LSI8

ROM2

32 Mbit

LSI3

1 2 ... 5 6 7 8 9 10 11 12 13 14 15 ... 36 37

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Pablo 08 Dec 2024 | 02:49:23

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Casio CTK-711EX Manuel d'utilisateur Page 10

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